1. Field of the Invention
The present invention relates to a PLL frequency synthesizer, and more particularly to a PLL frequency synthesizer for switching frequencies at high speed.
2. Description of the Related Art
A phase looked-loop (PLL) frequency synthesizer is used in a transmitter and/or a receiver in a radio apparatus and the like for the purpose of generating a desired frequency. The PLL frequency synthesizer is constituted by a reference oscillator, a voltage controlled oscillator (VCO), a phase comparator and a low-pass filter (LPF). The phase comparator detects a phase difference between an output frequency of the reference oscillator and an output frequency of the VCO. A signal corresponding with this phase difference is supplied as a control voltage to the voltage controlled oscillator through the LPF.
When this type of PLL frequency synthesizer is used in, e.g., mobile communication, high speed frequency switching is desired. Then, a PLL frequency synthesizer for switching frequencies at high speed is disclosed in, for example, Japanese Laid-Open Patent Application No. 214925/1991 (JP-A-03-214925). In this PLL frequency synthesizer, a switch is provided in parallel with the LPF as a loop filter. The switch is turned on when the frequency locking is started in the frequency switching operation and the input/output of the LPF is short-circuited, thereby supplying the control voltage corresponding with the phase difference to the VCO without the LPF.
In the above PLL frequency synthesizer, however, the response characteristics of the loop become unstable or switching noise is generated when the switch is turned off. Further, since the voltage which has already been charged in the loop filter is different from the control voltage for generating a desired frequency, the control voltage supplied to the VCO fluctuates.
As to the VCO, one having high modulation sensitivity with which the oscillation frequency greatly varies due to a small change in the control voltage is usually used. When noise is generated or the control voltage fluctuates as described above, the oscillation frequency therefore fluctuates even if it approaches a desired frequency. The time for locking the frequency is thus prolonged.
In addition, the conventional PLL frequency synthesizer stabilizes the oscillation frequency at a desired frequency only after repeatedly overshooting the desired oscillation frequency during frequency. Accordingly, there occurs such a problem that this overshooting locking prolongs the frequency-locking time.